V_MAGIC_DIV allow dst and dividend to be same reg
@@ -2390,10 +2390,11 @@ class KernelWriterAssembly(KernelWriter):
# Argument requirements:
# - dstIdx must be two consecutive registers ; on exit the lower one will contain the quotient. The upper is used as a temp.
# - First parm is passed as an integer vgpr index ; remaining are vgpr or sgpr symbolic names
+ # - dstIdx+1 cannot be same as dividend. dividend+0 can be same as dividend and this may be useful for chaining divides.
kStr += self.comment3("Magic div and mod functions")
kStr += ".macro V_MAGIC_DIV dstIdx, dividend, magicNumber, magicShift" + self.endLine
- kStr += " v_mul_lo_u32 v[\dstIdx+0], \dividend, \magicNumber" + self.endLine
kStr += " v_mul_hi_u32 v[\dstIdx+1], \dividend, \magicNumber" + self.endLine
+ kStr += " v_mul_lo_u32 v[\dstIdx+0], \dividend, \magicNumber" + self.endLine
kStr += " v_lshrrev_b64 v[\dstIdx:\dstIdx+1], \magicShift, v[\dstIdx:\dstIdx+1]" + self.endLine
kStr += ".endm" + self.endLine
