Fixing python based example to use asicflow target
@@ -7,6 +7,6 @@ chip.add('design', 'gcd')
chip.add('constraint', "examples/gcd/gcd.sdc")
chip.set('asic', 'diesize', "0 0 100.13 100.8")
chip.set('asic', 'coresize', "10.07 11.2 90.25 91")
-chip.target("freepdk45_asic")
+chip.target("freepdk45_asicflow")
chip.run()
chip.summary()
