Links added for Open Source simulators
Add links for Open Source simulators
Link to usage and installation instructions for Icarus Verilog, Verilator and GHDL.
Closes
@@ -25,6 +25,10 @@ In order to use this simulator, set :make:var:`SIM` to ``icarus``:
make SIM=icarus
+.. note::
+ A working installation of `Icarus Verilog <http://iverilog.icarus.com/>`_ is required.
+ You can find installation instructions `here <https://iverilog.fandom.com/wiki/Installation_Guide>`_.
+
.. _sim-icarus-accessing-bits:
Accessing bits in a vector
@@ -94,6 +98,10 @@ In order to use this simulator, set :make:var:`SIM` to ``verilator``:
make SIM=verilator
+.. note::
+ A working installation of `Verilator <https://www.veripool.org/verilator/>`_ is required.
+ You can find installation instructions `here <https://verilator.org/guide/latest/install.html>`_.
+
One major limitation compared to standard Verilog simulators is that it does not support delayed assignments when accessed from cocotb.
To run cocotb with Verilator, you need ``verilator`` in your PATH.
@@ -346,6 +354,10 @@ In order to use this simulator, set :make:var:`SIM` to ``ghdl``:
make SIM=ghdl
+.. note::
+ A working installation of `GHDL <https://ghdl.github.io/ghdl/about.html>`_ is required.
+ You can find installation instructions `here <https://ghdl.github.io/ghdl/getting.html>`_.
+
Noteworthy is that despite GHDL being a VHDL simulator, it implements the :term:`VPI` interface.
.. _sim-ghdl-issues:
