Fixing test for new constructore __init__
Design is always in object, but not in default schema
@@ -8,13 +8,13 @@ from siliconcompiler import _metadata
def test_read_manifest_fields():
'''Ensure that changes to fields other than 'value' are reflected by read_manifest()'''
- chip = siliconcompiler.Chip()
+ chip = siliconcompiler.Chip('foo')
chip.set('source', 'verilog', False, field='copy')
chip.add('source', 'verilog', 'foo.v')
chip.write_manifest('tmp.json')
# fresh chip, so we don't retain anything from `chip` in-memory
- chip2 = siliconcompiler.Chip()
+ chip2 = siliconcompiler.Chip('foo')
chip2.read_manifest('tmp.json')
assert chip2.get('source', 'verilog', field='copy') is False
@@ -22,13 +22,13 @@ def test_read_manifest_fields():
def test_read_sup():
'''Test compressed read/write'''
- chip = siliconcompiler.Chip()
+ chip = siliconcompiler.Chip('foo')
chip.add('source', 'verilog', 'foo.v')
chip.write_manifest('tmp.sup.gz')
- chip2 = siliconcompiler.Chip()
+ chip2 = siliconcompiler.Chip('foo')
chip2.read_manifest('tmp.sup.gz')
- assert chip2.get('source') == ['foo.v']
+ assert chip2.get('source','verilog') == ['foo.v']
def test_read_defaults(datadir):
@@ -37,7 +37,7 @@ def test_read_defaults(datadir):
DEBUG = False
# gets defaul from schema
- chip = siliconcompiler.Chip()
+ chip = siliconcompiler.Chip('test')
# check that read/write doesn't modify
chip.write_manifest("actual.json", prune=False)
@@ -54,8 +54,7 @@ def test_read_defaults(datadir):
expected = json.load(f)
# special case (initialized in constructor)
- expected['version']['software']['defvalue'] = _metadata.version
- expected['version']['software']['value'] = _metadata.version
+ expected['design']['value'] = 'test'
assert actual == expected
