Fix typo in post_process
@@ -73,9 +73,11 @@ class riscv_instr_sequence:
lead to dead loops in the absence of proper loop exiting conditions.
----------------------------------------------------------------------------------------------
'''
+
def post_process_instr(self):
label_idx = 0
branch_cnt = 0
+
def def_val():
return 0
branch_target = defaultdict(def_val)
@@ -93,8 +95,8 @@ class riscv_instr_sequence:
if((self.illegal_instr_pct > 0) and
(self.instr_stream.instr_list[i].insert_illegal_instr == 0)):
'''
- The illegal instruction generator always increase PC by 4 when resume execution,
- need to make sure PC + 4 is at the correct instruction boundary.
+ The illegal instruction generator always increase PC by 4 when resume
+ execution,need to make sure PC + 4 is at the correct instruction boundary.
'''
if(self.instr_stream.instr_list[i].is_compressed):
if(i < (len(self.instr_stream.instr_list) - 1)):
@@ -104,9 +106,11 @@ class riscv_instr_sequence:
else:
self.instr_stream.instr_list[i].is_illegal_instr = random.randrange(
0, min(100, self.illegal_instr_pct))
- if(self.hint_instr_pct > 0 and (self.instr_stream.instr_list[i].is_illegal_instr == 0)):
+ if(self.hint_instr_pct > 0 and
+ (self.instr_stream.instr_list[i].is_illegal_instr == 0)):
if(self.instr_stream.instr_list[i].is_compressed):
- self.instr_stream.instr_list[i].is_hint_instr = random.randrange(0, min(100, self.hint_instr_pct))
+ self.instr_stream.instr_list[i].is_hint_instr = random.randrange(
+ 0, min(100, self.hint_instr_pct))
self.instr_stream.instr_list[i].label = "{}".format(label_idx)
self.instr_stream.instr_list[i].is_local_numeric_label = 1
@@ -119,9 +123,8 @@ class riscv_instr_sequence:
# with vsc.foreach(self.branch_idx, idx = True) as i:
# self.branch_idx[i] in vsc.rangelist(1, cfg.max_branch_step)
# print("BI ", self.branch_idx[i])
-
while(i < len(self.instr_stream.instr_list)):
- if((self.instr_stream.instr_list[i].category == "BRANCH") and
+ if((self.instr_stream.instr_list[i].category.name == "BRANCH") and
not(self.instr_stream.instr_list[i].branch_assigned) and
not(self.instr_stream.instr_list[i].is_illegal_instr)):
'''
@@ -130,9 +133,11 @@ class riscv_instr_sequence:
The loop structure will be inserted with a separate routine using
reserved loop registers
'''
+ print(self.instr_stream.instr_list[i].category)
branch_target_label = 0
branch_byte_offset = 0
- branch_target_label = self.instr_stream.instr_list[i].idx + self.branch_idx[branch_cnt]
+ branch_target_label = self.instr_stream.instr_list[i].idx + \
+ self.branch_idx[branch_cnt]
if(branch_target_label >= label_idx):
branch_target_label = label_idx - 1
branch_cnt += 1
