Icarus: Default to latest SystemVerilog standard
@@ -54,6 +54,8 @@ endif
BUILD_VPI=1
+COMPILE_ARGS += -g2012 # Default to latest SystemVerilog standard
+
# Compilation phase
$(SIM_BUILD)/sim.vvp: $(SIM_BUILD) $(VERILOG_SOURCES) $(CUSTOM_COMPILE_DEPS)
$(CMD) -o $(SIM_BUILD)/sim.vvp -D COCOTB_SIM=1 -s $(TOPLEVEL) $(COMPILE_ARGS) $(EXTRA_ARGS) $(VERILOG_SOURCES)
